Electronic assemblies may be composed of a number of components. It is known in the art to mount sensor and signal processing components to a surface of a substrate. Some applications, known as “flip chip,” mount integrated circuits directly to a surface of a substrate. Other applications house a sensor or integrated circuit in a package. The package may include a lead frame, with one or more die are mounted on the leadframe. The leadframe and die are then encapsulated, and the package is mounted to a substrate, such as a printed circuit board, for example. It is known to increase the density of components on a substrate by stacking several integrated circuits within a single package, such as in U.S. Pat. No. 6,784,023, entitled “Method Of Fabrication Of Stacked Semiconductor Devices,” or U.S. Pat. No. 6,593,662 entitled “Stacked-Die Package Structure,” and then mounting the package to a substrate such as a printed circuit board. Some packages mount a single integrated circuit within a recess in a substrate within a package, such as U.S. Pat. No. 7,002,254, entitled “Integrated Circuit Package Employing Flip-Chip Technology And Method Of Assembly.” In any of these approaches, each component or package occupies real estate on the surface of the printed circuit board.
FIG. 1 schematically illustrates one type of stacked chip package 100 as known in the art. The package includes a lead frame 101 comprised of a paddle 102 and leads 103. The paddle 102 supports two stacked integrated circuits 104 and 105. The integrated circuits are interconnected by solder balls 106. The stacked integrated circuits 104 and 105 are coupled to the paddle portion 102 of the lead frame 101 by other solder balls 106. Some stacked assemblies provide wire bonds (not shown) to couple an integrated circuit to another integrated circuit in the stack, or to the lead frame. The integrated circuits 104 and 105, paddle 102, solder balls 106, and a portion of leads 103 are encapsulated in encapsulant 107. The package 100 is mounted to a substrate 108 via leads 103 extending from the paddle 102 of the lead frame 101 to the outside of the encapsulant 107. The mounted package 100 effectively occupies the portion of the substrate 108.
Flip-chip mounting as known in the art is schematically illustrated in FIG. 2. The integrated circuit 200 is coupled to the substrate 201 by solder balls 202. The mounted chip 200 effectively occupies the portion of the substrate 201. The chip 200 is exposed to its environment without the benefit of a surrounding package, and is therefore susceptible to damage from contact with other objects in the environment, in addition to other environmental factors, such as heat, dust, humidity, etc.
A prior art arrangement 300 of packaged sensors or integrated circuits 301 mounted to a substrate 302 is schematically illustrated in FIG. 3. The area, or “footprint,” occupied by each package 301 is larger than the circuit or sensor within the package. Together, the three mounted packages 301 occupy a portion of the surface area of the substrate 302 that is larger than the sum of their individual footprints.
Design rules for mounting packages, and the physical dimensions of the packages themselves, will require certain spacing between the devices. The real estate occupied will be even larger if room must be made for surface interconnections or a discrete component, such a resistor 303. Another consequence of this approach is that one sensor may be some distance from another sensor, possibly hampering their ability to sense or measure the same local environment. Spreading out the components 301 also requires longer interconnection conductors than a more compact layout, possibly leading to increased parasitic capacitances, or increased susceptibility to noise coupling to the signals.